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Showing posts with the label ensilica

AMBA AXI Protocol Interview Questions - Xilinx, Sicon, Ensilica and Mobiveil

Difference between AHB and AXI? Difference between AXI3 and AXI4? What is AXI Lite? Name five special features of AXI? Why streaming support,it's advantages? Write an assertion on handshake signals - ready and valid, ready comes after 5 cycles from the start of valid high? Explain AXI read transaction  What is the AXI capability of data interleaving? Explain out-of-order transaction support on AXI? Explain multiple outstanding address pending? Any flow control mechanism in AXI? How to ensure data integrity on AXI? What is 'last' signal? What are bursts and transfers? Maximum size of a transfer? Write response codes? What is strobing in AXI?

PCIe Transaction Layer Interview Questions - Analinear, Cyient and Ensilica

1. What are the functions performed by software layer in PCIe? 2. Difference between gen 2 and gen 3 PCIe protocols? 3. Functions of transaction and data link layers? 4. How FC credits mechanism works? 5. Difference between posted and non-posted transactions? 6. What is split transaction mechanism in PCIe? 7. Why do we need DLLPs? 8. How to corrupt PCIe packets? 9. Different types of routing mechanisms in PCIe? 10. How message packets are routed? 11. What is implicit routing? 12. Which types of packets are routed by ID?